Search Results - algorithms

Blog Post: CTO/CIO/SVP level Fortune 500 Tech leader available - Chicago Area only: Sr. Technology Manager

Level: CTO/CIO/SVP

Location: Chicago(No relocation)

SUMMARY:

Passionate technology and business manager with successful record of solving business…; Added by Christian Fauchald at 8:35pm on February 20, 2008

Deep learning is a way to automate predictive…

Added by Lucia Adams at 12:03pm on July 1, 2022

Blog Post: TOP 5 UNCONVENTIONAL WAYS TO EXPAND DATA SCIENCE KNOWLEDGE BEYOND ONLINE COURSES: It’s always a great idea to enrich your knowledge base about your favourite field of study. Knowledge is not only cumulative, it grows exponentially. Those with a rich base of factual knowledge…; Added by Lucia Adams at 5:52am on April 14, 2022

Blog Post: Challenges Hiring Managers Still Face in 2024. Can AI Help?: As we navigate the ever-evolving world of work, talent acquisition managers face unique challenges in finding and securing top talent. The year 2024 has brought…; Added by Rchilli Parser at 6:39am on May 23, 2024

Blog Post: TwitterJobSearch.com Launched!: Google exec Brian Bershad on Twitter: Google has no interest in its own version of "real time search."

"There's relatively little data in Twitter," Bershad said. "I think if you could take…; Added by william fischer at 9:06am on March 20, 2009

Blog Post: Analyst Jobs: Immense Scope And Bright Career Future: In this technology-driven era, it has become a humongous task to manage simultaneously the need of both the companies and consumers simultaneously. In such a scenario, the services rendered by…; Added by arpana sharma at 5:18am on October 16, 2019

Blog Post: Can Predictive Analytics Save Your Employees Before They Begin a New Job Search?: “For all of my career, I've been trying to catch people after they do something horrible. For once in my life, I'd like to catch somebody BEFORE they do something horrible, all right? Can you…; Added by Joe Seark at 11:50pm on March 30, 2015

Topic: Top Sourcing Tool: top candidates and predict who is about to leave their job, before they do!We offer a 7-day free trial: https://netin.co/trial …; Added by Soheil Yasrebi at 12:22pm on December 12, 2016

Comment on: Group 'Six Degrees': function is to be responsible to architect analog modules, have good understanding of the design and verification principles, provide guidance to junior engineers on design/simulation/layout, and perform reviews to improve the quality of delivery. He/she will also be actively involved in silicon characterization, debugging, quality improving and releasing to production. Qualifications： 1. Master’s Degree or higher in Electrical Engineering or equivalent. 2. 5+ years experience on analog IC design, with at least two years experience on data converter design or high speed interface design, and having successful mixed-signal design track record. 3. In-depth knowledge and design experience on at least one of following areas include high-speed/high-precision ADC/DAC, high speed SERDES/PHY, ROM/RAM/EFLASH, high performance PLL, PMU. Knowledgeable on digital signal processing or ESD is a plus. 4. Ability to work in a team environment; self-motivated and inclined to take initiatives; and with excellent communication skills. 2.Senior CMOS RF IC Designer http://jobirn.com/?jobid=2249 Location: Santa Clara, CA Responsibilities： Architecture and implement RFIC design, perform system/circuit design and verification, supervise layout engineers on layout of RF/Analog circuits. Qualifications： 1. MSEE or PhD, approximately +3 years on RFIC design experience SiGe or RFCMOS experience. 2. Strong design experience with chip level system design and circuit design, such as LNA, mixer, PLL, VCO, filter, etc. 3. Familiar with RFIC design verification, tape out, debug and characterization 4. Good Knowledge about device modeling and RF system. 5. Candidates will display good development thinking ability, excellent communication skills, initiative, and a team attitude.. 6. Experience on Zero IF WCDMA transceiver or GSM transceiver design or GSM Power amplifier is a plus 3.Video&Image Algorithm Expert (2 openings) http://jobirn.com/?jobid=2250 Location: Santa Clara/Shenzhen/Beijing Algorithm design/analysis/modeling in video or image processing Qualifications BS or higher in EE/CS/Math 8+ years experience in video or image processing algorithm design Experience in algorithm modeling or implementation of DSP processor in video standard protocols and graphics such as 2D/3D processing, image scalar, OSD, image de-noise, AWB, AE, and AF 4.Multimedia SOC Principal Engineer http://jobirn.com/?jobid=2251 Location: Santa Clara, CA Be responsible for requirement analysis, system analysis, architecture design and partition, analysis of performance trade-offs, issues and looking for ways to improve architecture implementation and cost to achieve competition capability for the multimedia processing high performance SOC designs which will be part of the next generation of video consumer electronics including high definition DVD players/recorders, Set-top Boxes and Digital TVs. Qualifications Minimum of 8 years experience in design of signal processing ICs. Experience in the architecture/design of multimedia processors for consumer electronics, especially high definition DVD players / recorders, HD Set-top Boxes and HD Digital TVs, is highly desirable. Demonstrated ability to innovate and make architectural/design trade-offs for balancing performance/power/area of designs Multimedia experience including one or more of camera, display, video codecs & standards, 2D & 3D graphics and multimedia processing is required. System experience including system loading, MIPS analysis, interfaces, bandwidth optimization and STB architecture & digital video standards is also required. 5.Staff Analog Design Engineer --- Data Converter/AFE http://jobirn.com/?jobid=2252 Location: Santa Clara, CA Roles and Responsibilities Architect and implement analog and mixed-signal systems and circuits, such as ADCs, DACs, and Analog Front End (AFE). Responsibility includes circuit design, simulation/verification, layout supervision, lab characterization/validation, and yield improvement. Requirements: 1. At least 3 to 5 years’ analog IC design experience in a product development environment. 2. Strong silicon design experience in at least one of the following fields: high speed/high precision ADCs (pipelined/delta-sigma), high speed/high precision DACs (current-steering/delta-sigma), analog filters, Programmable Gain Amplifiers (PGA), High-speed amplifiers/op-amps, and line drivers. 3. Knowledge/experience of data converter calibration (digital/analog) is a plus. 4. Good lab debugging skills is a plus. 5. Knowledge of Matlab/Simulink modeling and simulation is a plus. 6. MS or Ph.D. in Electrical Engineering or related disciplines. 6.Sr. SERDES Design Engineer http://jobirn.com/?jobid=2253 Location: Santa Clara, CA Position Summary: Our Serdes design team is seeking an outstanding team member to help us bring new products from design to market and provide fast, reliable solutions to our customers. In this exciting role you will be designing sophisticated high-performance Serdes with our Serdes team to advance the technology solutions in the ASIC market. Accountabilities: -Design and verify sophisticated mixed-signal analog blocks for high-speed SerDes such as PLL, CDR, Serializer, Deserializer, etc. -Participate and be a key contributor in chip and block level architectures. -Develop circuit schematics and perform all necessary verification/simulations. -Assist in architecture, layout, integration, bring-up, post silicon debugging, and characterization. -Generate design review documentation. -Interface with other design team members and provide directions to layout and other design engineers, ensuring that electrical performance meets specifications and requirements. -Exchange information with, and provide guidance to, other team members in their daily activities. -Resolve a wide range of issues; fully proficient in understanding of industry communication standards and test equipment tools. -Self motivated team player. Qualifications: -BS/MS/PhD Electrical Engineering, and Good communication skills. -5+ years of analog circuit design experience, mostly in high-speed and low-jitter SERDES. -Familiar with analog/mixed signal circuit design flow, hands-on experience in designing high speed (> 6.5GHz) analog circuits such as PLL, VCO, CDR, SERDES, equalizer. -Familiar with design techniques and trade-offs on reducing jitter and increasing operating frequency. -Knowledge of physical layer. All need 5+ exp. Thanks. -Jack http://jobirn.com jobirn@jobirn.com…; Added by JackChang to Six Degrees at 12:38pm on August 22, 2008

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